The Tunnel Field Effect Transistor, or TFET, is a device being studied for its potential to overcome certain obstacles in transistor manufacture and operation that are likely to arise at deep sub-micron microprocessor technology nodes. Among other potential advantages, it is anticipated that TFETs will help enable scaling to, for example, 22 nanometers (nm) because the threshold voltage (Vt) of a TFET is not limited by the discrete nature of dopants in the channel region with scaling, and because sub-threshold swing S can be lower than 60 millivolts/decade (mV/dec). As a result, the off-state leakage current (Ioff) can be significantly reduced below that of existing complementary metal-oxide semiconductors (CMOS) devices. TFETs also have high-speed switching capability.
The TFET structure is close to that of a CMOS transistor. There are two types of TFET: n-type (NTFETs) and p-type (PTFETs). The drain current increases with increasing gate voltage (Vg) for an NTFET and increases with decreasing Vg for a PTFET. The NTFET switches on for gate-source voltage (Vgs) greater than Vt, while the PTFET switches on for Vgs less than Vt. The source in an NTFET is p-doped while the drain is n-doped and the source in a PTFET is n-doped while the drain is p-doped. A TFET shows exponentially increasing and temperature-independent characteristics at both off and on states. Unlike conventional CMOS devices, where sub-threshold swing S has a lower limit of 60 mV/dec at 300K, S in TFETs is independent of temperature. As a result, as mentioned above, off-state leakage can be significantly reduced. The threshold voltage in a TFET is controlled by the width and the height at the source end of the tunneling junction and is independent of the channel doping. The energy band gap at the tunnel junction determines the tunnel barrier height. It has also been demonstrated that the introduction of what is referred to as a delta layer between source and channel regions lowers the valence band offset and band gap at the tunneling junction with respect to the source region material. This decreases the tunneling barrier height, thus leading to higher tunneling probability.
For simplicity and clarity of illustration, the drawing figures illustrate the general manner of construction, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the discussion of the described embodiments of the invention. Additionally, elements in the drawing figures are not necessarily drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of embodiments of the present invention. The same reference numerals in different figures denote the same elements, while similar reference numerals may, but do not necessarily, denote similar elements.
The terms “first,” “second,” “third,” “fourth,” and the like in the description and in the claims, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Similarly, if a method is described herein as comprising a series of steps, the order of such steps as presented herein is not necessarily the only order in which such steps may be performed, and certain of the stated steps may possibly be omitted and/or certain other steps not described herein may possibly be added to the method. Furthermore, the terms “comprise,” “include,” “have,” and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
The terms “left,” “right,” “front,” “back,” “top,” “bottom,” “over,” “under,” and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein. The term “coupled,” as used herein, is defined as directly or indirectly connected in an electrical or non-electrical manner. Objects described herein as being “adjacent to” each other may be in physical contact with each other, in close proximity to each other, or in the same general region or area as each other, as appropriate for the context in which the phrase is used. Occurrences of the phrase “in one embodiment” herein do not necessarily all refer to the same embodiment.